1. Field of the Invention
The present invention relates to a transistor fabrication method. More particularly, the present invention relates to a fabrication method for forming a transistor having a metal gate and a gate dielectric layer with a high dielectric constant.
2. Description of the Related Art
Advances in integrated devices have led to a size reduction in devices. In order to correspond with this fabrication trend, not only does the fabrication technique need to be improved, but also the materials must be changed.
For example, while forming a transistor, a silicon oxide layer formed by thermal oxidation is commonly used as a gate dielectric layer. In order to prevent a short channel effect and have a maximum drain current, the gate dielectric layer is reduced in thickness to about 30 angstroms.
However, for a transistor having a particular thin oxide layer serving as a gate dielectric layer, a high leakage current generated from the gate dielectric layer may occur. In order to prevent the leakage current, it is advantageous to have a dielectric layer with a high dielectric constant serving as a gate dielectric layer.
In addition, for a device having a size smaller than 400 mm.sup.2, it is necessary to have a gate with a sheet resistance lower than 5 ohms/square unit (.OMEGA./.quadrature.) under the restriction of a word line delay of 2 nano-seconds.
Conventionally, the conductive material of the gate is polysilicon, which is quite compatible with the device fabrication process. However, the sheet resistance of the polysilicon gate is too high to achieve the above-described requirement. Thus, since a metal gate has a low sheet resistance, metallic material has becomes another preferred gate material.
Commonly, in a fabrication process for forming a transistor having a metal gate and a gate dielectric layer with a high dielectric constant, the source/drain region is formed after the gate is formed. The source/drain region is formed by first performing an ion implantation step with the gate serving as a mask, and then performing a thermal process to make the dopant spread homogeneously.
However, since the thermal process must be performed at a high temperature in order to make the dopant spread homogeneously, the reliability of the transistor is affected.